A designer may use a high-level modeling system (HLMS), such as System Generator available from Xilinx Inc., to develop and simulate an electronic design. Typically, a designer develops an electronic design by selecting functional blocks from a library of functional blocks and interconnecting the functional blocks with signals. During simulation of the electronic design in the HLMS, data is transferred on the signals between the functional blocks of the electronic design.
Data transferred on signals between functional blocks may have many possible formats and representations. Typically, the functional blocks from the library may support a wide variety of configurable formats to represent the data externally transmitted and received on signals connected to the functional block, with a specific external format selected by the designer during development of the electronic design. Each functional block may have a corresponding simulation model that uses an internal representation for the data, and these internal representations are typically selected from the limited number of intrinsic data types available in the software language, such as C, C++, or MATLAB m-code, used to specify the simulation model.
During simulation of an electronic design in a HLMS, data transferred by signals of the electronic design may need to be converted between the various external formats and internal representations for the data. The conversion of the data between the various external formats and internal representations may consume a significant portion of the computational resources needed to simulate an electronic design. Efficient conversion between data representations may improve simulation performance.
The present invention may address one or more of the above issues.